This invention relates to an improvement in the method of making integrated circuits, and especially an improved method of making interconnection metal strips, capable of reliable connection with narrower width strips. This invention purports to increase the reliability of interconnection as well as to decrease the area necessary for the interconnection of an integrated circuit.
The prior art method of making interconnection in metal-oxide-semiconductor (hereinafter referred to as MOS) integrated circuits (hereinafter referred to as ICs) is described with reference to FIGS. 1 to 6. In FIG. 1 which is a perspective view of a part of a conventional IC, wherein a semiconductor substrate 1 has a number of strip shaped diffused regions 2a, 2b, 2c, . . . of P+ conductivity type on its upper face. An insulating layer 3 of silicon dioxide has openings 5a, 5b, 5c, . . . on specified positions on the diffused regions 2a, 2b, 2c, . . . On the insulating layer 3, a number of metal strips 4a, 4b, 4c, . . . of, for instance, aluminum are provided by vapor deposition and subsequent masked etching in a manner that the direction of the metal strip makes a right angle to the direction of the strips of the diffused regions 2a, 2b, 2c, . . . , so that the parts of the metal strips that are on the openings 5a, 5b, 5c, . . . contact the surfaces of the diffused regions 2a, 2b, 2c, . . . , for interconnection therewith.
The conventional method of making the above-mentioned IC is explained with reference to FIGS. 2 to 5, which show enlarged sections in various manufacturing steps of the part of the device of FIG. 1 that includes the opening 5b.
An insulating layer, for instance, a silicon dioxide layer 3, is provided to coat a principal face of an N-type silicon substrate 1. The diffused regions 2a, 2b, 2c, . . . of, for instance, P+ conductivity type, have been preliminarily formed in a specified pattern on the principal face. Then, by a known photochemical process, the insulating layer 3 is coated with a photoresist layer 6 of a specified pattern having holes on specified positions of the diffused regions, and the insulating layer 3 is treated with a known etchant, for instance, hydrogen peroxide solution. Accordingly, the parts of insulating layer 3 that are exposed through openings of the photoresist layer 6 are etched away to form openings 5b, . . . , from which the P+ - type diffused regions 2b, . . . of the semiconductor substrate 1 are exposed, as shown in FIG. 2.
Next, the photoresist layer 6 is removed by a known method, and then a metal layer 4 of, for instance, aluminum is vapor deposited into the openings 5b, . . . and upon the insulating layer 3, as shown in FIG. 3.
Finally, the unnecessary parts of the metal layer 4 are removed by a known masked etching method, so as to form the metal strips 4a, 4b, 4c, . . . of a specified pattern, as shown in FIG. 4. Thus, the metal strips, 4b, . . . contact the diffused regions 2b, . . . embedded in the openings 5b, . . . , as shown in FIGS. 4, 5, and 6.
In the conventional IC made by the above-mentioned method, the metal part, which is in the opening 5b and is in contact with the semiconductor, is connected to the metal strip on the insulating layer 3 with thin step parts A around the brim of the opening 5b. Since these thin step parts A are electrically and mechanically fragile, and are likely to be broken by an overcurrent, it has been necessary that the width of the metal strips 4a, 4b, 4c, . . . be made wider, by the width (2T) of the two side paths 4b1, 4b2, than the width of the openings 5a, 5b, 5c, . . . The side paths 4b1 and 4b2 are provided in order to form the connecting parts A in all of the sides of the openings 5b, . . . , for the sake of a larger total cross section and doubling of the electric path between the metal in the opening and the metal on the insulating layer. Since the average width of a pair of side paths is about 2.5 to 5 microns for one metal strip, the area occupied by the side paths cannot be overlooked. Accordingly, it is an important consideration to dispense with such side paths for decreasing the size of IC. Moreover, conventional ICs are likely to show defects due to the above-mentioned breaks in the thin step parts A in their reliability tests in the actual manufacturing process, and therefore, a drastic improvement has been sought. Several measures have been proposed, for instance, to tilt, swing or rotate the substrate during the vapor deposition of the metal layer, in order to make oblique and thicken the thin step parts A between the metal in the opening and the metal on the insulating layer. However, such measures necessarily deform the section of the metal strip into a trapezoid and increase the width at the base of the metal strip, and moreover are liable to make the pattern of the metal inaccurate.